Job responsibilities
1.Be involved in designing and implementing low-power and high-performance custom IP (STD cell, Macro, SRAM...) architectures and circuits , guiding physical layout design;
2.Characterizing timing library of custom IP;
3.Test scheme and circuit design for custom IP in test chip.
Requirements
1.MS (or above) in Electrical Engineering or other related engineering field;
2.Knowledge of CMOS devices and technology , especially FinFET. Analog circuit design experience or layout experience is a plus;
3.Familiar with EDA tools (Hspice,Virtuoso and etc) is a plus;
4.Perl, Tcl or Python is a puls;
5.Good team player, good communication skills.
