Job responsibilities
1.Responsible for ASIC design evaluation, document writing and RTL implementation of high-energy-efficiency chip
2.Responsible for module synthesis and power consumption, performance and timing optimization
3.Responsible for the basic function verification and formal verification
4.Work with verification engineer to complete the functional verification
5.Work with back-end physical design engineers to optimize constraint files
Requirements
1.Bachelor degree or above, major in microelectronics, computer, electronic information, etc.;
2.Solid digital design knowledge
3.Familiar with the digital design and verification process and related tools
4.Familiar with Verilog and system Verilog, familiar with script language is a plus.
5.Sense of responsibility, teamwork spirit.
